document number: 94394 for tec hnical questions, contact: indmodules@vishay.com www.vishay.com revision: 23-apr-10 1 phase control thyristors (stud version), 1650 a st1200c..kp series vishay high power products features ? center amplifying gate ? metal case with ceramic insulator ? international standa rd case a-24 (k-puk) ? high profile hockey puk ? compliant to rohs directive 2002/95/ec ? designed and qualified for industrial level typical applications ? dc motor controls ? controlled dc power supplies ? ac controllers electrical specifications product summary i t(av) 1650 a a-24 (k-puk) major ratings and characteristics parameter test conditions values units i t(av) 1650 a t hs 55 c i t(rms) 3080 a t hs 25 c i tsm 50 hz 30 500 a 60 hz 32 000 i 2 t 50 hz 4651 ka 2 s 60 hz 4250 v drm /v rrm 1200 to 2000 v t q typical 200 s t j - 40 to 125 c voltage ratings type number voltage code v drm /v rrm , maximum repetitive peak and off-state voltage v v rsm , maximum non-repetitive peak voltage v i drm /i rrm maximum at t j = t j maximum ma st1200c..k 12 1200 1300 100 14 1400 1500 16 1600 1700 18 1800 1900 20 2000 2100
www.vishay.com for technical questions, contact: indmodules@vishay.com document number: 94394 2 revision: 23-apr-10 st1200c..kp series vishay high power products phase control thyristors (stud version), 1650 a absolute maximum ratings parameter symbol test conditions values units maximum average on-state current at heatsink temperature i t(av) 180 conduction, half sine wave double side (sin gle side) cooled 1650 (700) a 55 (85) c maximum rms on-state current i t(rms) dc at 25 c heatsink temp erature double side cooled 3080 a maximum peak, one-cycle non-repetitive surge current i tsm t = 10 ms no voltage reapplied sinusoidal half wave, initial t j = t j maximum 30 500 t = 8.3 ms 32 000 t = 10 ms 100 % v rrm reapplied 25 700 t = 8.3 ms 26 900 maximum i 2 t for fusing i 2 t t = 10 ms no voltage reapplied 4651 ka 2 s t = 8.3 ms 4250 t = 10 ms 100 % v rrm reapplied 3300 t = 8.3 ms 3000 maximum i 2 t for fusing i 2 t t = 0.1 ms to 10 ms, no voltage reapplied 46 510 ka 2 s low level value of threshold voltage v t(to)1 (16.7 % x x i t(av) < i < x i t(av) ), t j = t j maximum 0.91 v high level value of threshold voltage v t(to)2 (i > x i t(av) ), t j = t j maximum 1.01 low level value of on-state slope resistance r t1 (16.7 % x x i t(av) < i < x i t(av) ), t j = t j maximum 0.21 m high level value of on-state slope resistance r t2 (i > x i t(av) ), t j = t j maximum 0.19 maximum on-state voltage v tm i pk = 4000 a, t j = t j maximum, t p = 10 ms sine pulse 1.73 v maximum holding current i h t j = 25 c, anode supply 12 v resistive load 600 ma typical latching current i l 1000 switching parameter symbol test conditions values units maximum non-repe titive rate of rise of turned-on current di/dt gate drive 20 v, 20 , t r 1 s t j = t j maximum, anode voltage 80 % v drm 1000 a/s typical delay time t d gate current 1 a, di g /dt = 1 a/s v d = 0.67 % v drm , t j = 25 c 1.9 s typical turn-off time t q i tm = 550 a, t j = t j maximum, di/dt = 40 a/s, v r = 50 v, dv/dt = 20 v/s, gate 0 v 100 , t p = 500 s 200 blocking parameter symbol test conditions values units maximum critical rate of rise of off-state voltage dv/dt t j = t j maximum linear to 80 % rated v drm 500 v/s maximum peak reverse and off-state leakage current i rrm , i drm t j = t j maximum, rated v drm /v rrm applied 100 ma
document number: 94394 for tec hnical questions, contact: indmodules@vishay.com www.vishay.com revision: 23-apr-10 3 st1200c..kp series phase control thyristors (stud version), 1650 a vishay high power products note ? the table above shows the increment of thermal resistance r thjc when devices operate at different conduction angles than dc triggering parameter symbol test conditions values units typ. max. maximum peak gate power p gm t j = t j maximum, t p 5 ms 16 w maximum average gate power p g(av) t j = t j maximum, f = 50 hz, d% = 50 3 maximum peak positi ve gate current i gm t j = t j maximum, t p 5 ms 3.0 a maximum peak positive gate voltage + v gm 20 v maximum peak negative gate voltage - v gm 5.0 dc gate current required to trigger i gt t j = - 40 c maximum required gate trigger/ current/voltage are the lowest value which will trigger all units 12 v anode to cathode applied 200 - ma t j = 25 c 100 200 t j = 125 c 50 - dc gate voltage required to trigger v gt t j = - 40 c 1.4 - v t j = 25 c 1.1 3.0 t j = 125 c 0.9 - dc gate current not to trigger i gd t j = t j maximum maximum gate current/voltage not to trigger is the maximum value which will not trigger any unit with rated v drm anode to cathode applied 10 ma dc gate voltage not to trigger v gd 0.25 v thermal and mechanical specifications parameter symbol test conditions values units maximum operating junction temperature range t j - 40 to 125 c maximum storage temperature range t stg - 40 to 150 maximum thermal resistance, junction to heatsink r thj-hs dc operation single side cooled 0.0.42 k/w dc operation double side cooled 0.021 maximum thermal resistance, case to heatsink r thc-hs dc operation single side cooled 0.006 dc operation double side cooled 0.003 mounting force, 10 % 24 500 (2500) n (kg) approximate weight 425 g case style see dimensions - link at the end of datasheet a-24 (k-puk) r thjc conduction conduction angle sinusoidal conduction rectangular conduction test conditions units single side double side single side double side 180 0.003 0.003 0.002 0.002 t j = t j maximum k/w 120 0.004 0.004 0.004 0.004 90 0.005 0.005 0.005 0.005 60 0.007 0.007 0.007 0.007 30 0.012 0.012 0.012 0.012
www.vishay.com for technical questions, contact: indmodules@vishay.com document number: 94394 4 revision: 23-apr-10 st1200c..kp series vishay high power products phase control thyristors (stud version), 1650 a fig. 1 - current ratings characteristics fig. 2 - current ratings characteristics fig. 3 - current ratings characteristics fig. 4 - current ratings characteristics fig. 5 - on-state po wer loss characteristics fig. 6 - on-state po wer loss characteristics average on-state current (a) maximum allowable heatsink temperature (c) 40 50 60 70 80 90 100 110 120 130 0 200 400 600 800 1000 1200 30 60 90 120 180 conduction angle st1200c..k series (single side cooled) r (dc) = 0.042 k/w thj-hs maximum allowable heatsink temperature (c) average on-state current (a) 20 30 40 50 60 70 80 90 100 110 120 130 0 400 800 1200 1600 2000 dc 30 60 90 120 180 conduction period st1200c..k series (single side cooled) r (dc) = 0.042 k/w thj-hs average on-state current (a) maximum allowable heatsink temperature (c) 30 40 50 60 70 80 90 100 110 120 130 0 400 800 1200 1600 2000 30 60 90 120 180 conduction angle st1200c..k series (double side cooled) r (dc) = 0.021 k/w thj-hs average on-state current (a) maximum allowable heatsink temperature (c) 20 30 40 50 60 70 80 90 100 110 120 130 0 600 1200 1800 2400 3000 3600 dc 30 60 90 120 180 conduction period st1200c..k series (double side cooled) r (dc) = 0.021 k/w thj-hs average on-state current (a) maximum allowable heatsink temperature (c) 0 500 1000 1500 2000 2500 3000 3500 4000 0 400 800 1200 1600 2000 180 120 90 60 30 rms limit conduction angle st1200c..k series t = 125c j maximum allowable heatsink temperature (c) average on-state current (a) 0 1000 2000 3000 4000 5000 0 600 1200 1800 2400 3000 3600 dc 180 120 90 60 30 rms limit conduction period st1200c..k series t = 125c j
document number: 94394 for tec hnical questions, contact: indmodules@vishay.com www.vishay.com revision: 23-apr-10 5 st1200c..kp series phase control thyristors (stud version), 1650 a vishay high power products fig. 7 - maximum non- repetitive surge current single and double side cooled fig. 8 - maximum non-re petitive surge current single and double side cooled fig. 9 - on-state volt age drop characteristics fig. 10 - ther mal impedance z thj-hs characteristics number of equal amplitude half cycle current pulses (n) peak half sine wave on-state current (a) 12000 14000 16000 18000 20000 22000 24000 26000 28000 11010 0 initial t = 125c @ 60 hz 0.0083 s @ 50 hz 0.0100 s j at any rated load condition and with rated v applied following surge. rrm st1200c..k series pulse train duration (s) peak half sine wave on-state current (a) 12000 14000 16000 18000 20000 22000 24000 26000 28000 30000 32000 0.01 0.1 1 versus pulse train duration. control maximum non repetitive surge current initial t = 125c no voltage reapplied rated v reapplied j rrm of conduction may not be maintained. st1200c..k series instantaneous on-state voltage (v) instantaneous on-state current (a) 100 1000 10000 0.5 1 1.5 2 2.5 3 t = 25c j t = 125c j st1200c..k series square wave pulse duration (s) transient thermal impedance z (k/w) thj-hs 0.001 0.01 0.1 0.001 0.01 0.1 1 10 steady state value r = 0.042 k/w (single side cooled) r = 0.021 k/w (double side cooled) (dc operation) thj-hs thj-hs st1200c..k series
www.vishay.com for technical questions, contact: indmodules@vishay.com document number: 94394 6 revision: 23-apr-10 st1200c..kp series vishay high power products phase control thyristors (stud version), 1650 a fig. 11 - gate characteristics ordering information table instantaneous gate current (a) instantaneous gate voltage (v) 0.1 1 10 100 0.001 0.01 0.1 1 10 10 0 vgd igd (b) (a) tj=25 c tj=125 c tj=-40 c (2) a) recommended load line for b) recommended load line for <=30% rated di/dt : 10v, 10ohms frequency limited by pg(av) rated di/dt : 20v, 10ohms; tr<=1 s tr<=1 s rectangular gate pulse (3) (1) (1) pgm = 10w, tp = 4ms (2) pgm = 20w, tp = 2ms (3) pgm = 40w, tp = 1ms device: st1200c..k series 1 - thyristor 2 - essential part number 3 - 0 = converter grade 4 - c = ceramic puk 8 - critical dv/dt: 5 - voltage code: code x 100 = v rrm (see voltage ratings table) 6 - k = puk case a-24 (k-puk) 9 - p = lead (pb)-free 7 - 0 = eyelet terminals (gate and auxiliary cathode unsoldered leads) 1 = fast-on terminals (gate and auxiliary cathode unsoldered leads) 2 = eyelet terminals (gate and auxiliary cathode soldered leads) 3 = fast-on terminals (gate and auxiliary cathode soldered leads) none = 500 v/s (standard selection) l = 1000 v/s (special selection) device code 5 1 3 24 6789 st 120 0 c 20 k 1 - p links to related documents dimensions www.vishay.com/doc?95081
document number: 95081 for tec hnical questions, contact: indmodules@vishay.com www.vishay.com revision: 02-aug-07 1 a-24 (k-puk) outline dimensions vishay semiconductors dimensions in millimeters (inches) 74.5 (2.9) dia. max. 2 holes dia. 3.5 (0.14) x 2.1 (0.1) deep 4.75 (0.2) nom. 44 (1.73) creepage distance: 28.88 (1.137) minimum strike distance: 17.99 (0.708) minimum quote between upper and lower pole pieces has to be considered after application of mounting force (see thermal and mechanical specification) 20 5 pin receptable amp. 60598-1 1 (0.04) min. 2 places 47.5 (1.87) dia. max. 2 places 27.5 (1.08) max. 67 (2.6) dia. max.
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